The ICL 7502 - Store (Memory)_

Store, or working memory was not particularly abundant in the 7500, but as it was required to do no processing on behalf of the user (except in less common circumstances) that was not a big problem. As it was a 16-bit, word-orientated system, there was a maximum address range of 64K words (128K bytes), and there was no paging or virtual address space.

There was a significant limitation in the address range which could be used, however. The PROGRAMME COUNTER was just 14 bits long, and the top two bits were used for the MILL state. This meant that only instructions residing in the lowest quarter of the address range could be executed, but all of the address range was available for data storage. In common systems, this was of no consequence, and because the dynamic RAM was still of low density and expensive, it was simply not installed at addresses out of range of the programme counter. A common configuration for small numbers of attached terminals would have just 16K bytes of store, and full whack was just 28K bytes.

Two store ranges were of particular interest: the area from X4000 to X7FFF was reserved for video store, and from X3800 to X3FFF was a read-only area comprising a bootstrap loader and engineer's function. An interesting tweak caused the first four words of the ROM to be mirrored at the bottom of the address range (X0000 to X0003) and this provided fixed programme entry points.

The ROM was implemented on the full-width store boards, and was simply disabled if another board of the same type was installed for additional store. The system bootstrap would read the rotary switch (7502/5 only) on the operator's panel on entry, and go into the designated action. When the switch was set to 0 the system would emulate a 7502/3 which had no switch, and positions 11-15 were not used.

The ROM also contained some rather arcane engineer's functions - for example to load store via a set of 8 data switches on the rear of the system unit (where they could not be seen by the users) or to dump store contents to a local printer.

Video store was sufficient for up to 8 screens of 2000 characters, and was normally provided through boards providing for 2 screens each. The screens were mapped onto store, so the CPU only needed to write to specific locations in order to make text visible. Video store was only 12 bits wide, separated into a bottom 7 bits for a 128 character repertoire, and a set of 5 uppermost bits that gave the displayed characters special attributes:

  • X8000 - CURSOR
  • X4000 - SOM (Start of Message)
  • X2000 - FLASHING
  • X1000 - BLANKED
  • X0800 - PROTECTED (low intensity)

A 7502 system that had just powered up would present a set of screens with mostly random contents, but it was common to find groups of characters with common attributes, so a riot of variously flashing and half-brightness garbage with tramlines of continuous cursor would persist until the ROM was entered, at which point the whole store range would first clear to ZERO (a small right-foot character) and then the video store to SPACE and calm would break out. If the system went to a reset condition while operating, the screens would simply freeze, and there was nothing the operator could do to cause a resumption of service except walk to the CPU and reset it.

Because no part of the lower store range could be used as a buffer area in case it was overwritten, and there was no guarantee of any store availability except for the first screen area, this was used by the ROM to hold the TERMINAL EXECUTIVE code as it arrived from the host mainframe during teleloading. As the data were 7 bits wide with parity, the video store 'hole' in bits 10 to 7 was not a problem. A teleloading system thus showed a trickling display of moving characters on the top two lines of the first screen.

HIGH store, above X8000, was unusual, but could be populated where extended data storage for special applications was required. Instructions could not be executed from here, but systems that were set up for running TPL for end-user computation would load the semi-compiled object code into this area. At Letchworth Development Centre, we created the COUNTER TERMINAL SYSTEM, and this could run TPL, but we also used high store for holding application code that was moved into low store freed by once-only initialisation code.

Store was offered by a number of boards, some of which were half-width to fit the top backplane slot on a 7502.

  • P010 - RAM + 4Kb ROM
  • P016 - 4 Kb RAM (half-width)
  • P025 - 20 Kb RAM + 4Kb VRAM (7501 application)
  • P030 - 12 Kb RAM + 4Kb ROM
  • P033 - 16 Kb RAM (half-width)
  • P095 - 64 Kb RAM + 4Kb ROM